OCZ Vertex 2 (SSD)

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Boot ROM

  • Two-wire serial EEPROM (?)
ATMLH024
2ECI

UART

  • 3.3V serial port onboard at 115200 8N1

Bootlog

CLI> PINRST
*** ROM 106 Mar 12 2009 20:29:35 ***
FW_SRC 0 SHA PASS!
*** EEPROM 207 Jan  3 2011 18:36:47 BuildServer:FW_Common_Critical_Fixes:P1_EEPROM_2_0_7_drop-290232 ***
IMFT25 Timing EPch
*** Patch 1.4.1 Apr  8 2011 01:01:57 BuildServer:P1_3_6_1_MP4_Patch1_20110408:P1_3_6_1_MP4_Patch1_20110408-305073 ***
IMFT25 Timing EPch
RCPch SAK0

binary data follows...

According to this link with the serial EEPROM unsoldered the output changes to:

CLI> PINRST
*** ROM 106 Mar 12 2009 20:29:35 ***
*** Patch 1.4.1 Apr  8 2011 00:55:09 BuildServer:P1_3_6_1_MP4_Patch1_20110408:P1_3_6_1_MP4_Patch1_20110408-305073 ***
RCPch SAK0+Fmgr
Failed to read EPA=200800C0, using ByteLaneMask=2, ByteLaneTable[0]=1
Failed to read EPA=200800C0, using ByteLaneMask=4, ByteLaneTable[1]=2
Failed to read EPA=200800C0, using ByteLaneMask=1, ByteLaneTable[2]=0
Failed to read EPA=200800C0, using ByteLaneMask=8, ByteLaneTable[3]=3
RCPch SHI
sysclk 150 MHz
JTAG En 0
Link ...
up

JTAG

A JTAG port is onboard, but the pins are not marked on all board variants.

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